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| View Original: | XOR using NAND.svg (248x75) | |||
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| Courtesy of: | commons.wikimedia.org | More Like This | ||
| Keywords: XOR using NAND.svg XOR implemented with NAND gates XOR_Using_NAND jpg 2009-10-27 08 44 UTC XOR_Using_NAND jpg KlaudiuMihaila derivative work Robert A Maxwell <span class signature-talk >talk</span> <br /> To reproduce this image with circuit-macros use the following code <pre> PS cct_init include HOMELIB_`liblog m4' scale 25 4 Use millimetres sec 5 Horizontal length of each section vgap 20 Vertical gap between A and B nawid 11 Need a value for width of NAND gate before use LA A rjust; line right_ nawid+4 sec NA1 NAND_gate with In1 at Here move to 0 -vgap LB B rjust; line right_ nawid+4 sec NA2 NAND_gate with In2 at Here move to 2 sec -vgap/2 NA3 NAND_gate; line right_ sec; dot move to NA3 Out+ sec 0 ; line to Here x NA1 In2 y ; line to NA1 In2 move to NA3 Out+ sec 0 ; line to Here x NA2 In1 y ; line to NA2 In1 dot at LA+ sec 0 ; line to Here x NA3 In1 y ; line to NA3 In1 dot at LB+ sec 0 ; line to Here x NA3 In2 y ; line to NA3 In2 move to 2 nawid+6 sec -vgap/2 NA4 NAND_gate; line right_ sec; A XOR B ljust line from NA1 Out right_ sec; line to Here x NA4 In1 y ; line to NA4 In1 line from NA2 Out right_ sec; line to Here x NA4 In2 y ; line to NA4 In2 PE </pre> Redrawn in circuit-macros and saved as SVG circuit-macros XOR_Using_NAND jpg Alternative logic gates NAND gate symbols XOR gates | ||||
